Electromagnetic Simulation of Large Chip-Package Designs Using Clarity 3D Solver
Electromagnetic (EM) simulation of large chip-package designs using the Cadence Clarity 3D Solver is discussed by Nicholas Swart, principal CAD engineer at Analog Devices. Learn about detailed results of the Clarity simulation performance obtained on ADI’s compute farm, where the company easily simulated a large, complex system-on-chip (SoC) laminate in approximately 15 hours with modest per-machine memory consumption.
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